Embodiments of the invention relate to a semiconductor device fabricating method.
FIG. 1 is a concept view of semiconductor devices in a SiP (System in a Package) arrangement according to fabricating method of the related art.
As shown in FIG. 1, the semiconductor devices in the SiP package according to the related art comprise an interposer 1, a first device 3, a second device 5, and a third device 7. The first to third devices 3, 5, and 7 can, for example, be independently selected from a CPU, SRAM, DRAM, Flash Memory, Logic LSI, Power IC, Control IC, Analog LSI, MM IC, CMOS RF-IC, Sensor Chip, application specific IC, and MEMS Chip, etc.
Between the first device 3 and the second device 5, and between the second device 5 and the third device 7, connecting means for connecting signals between the respective devices are formed, respectively. As one connecting means for connecting signals between the respective devices, there may be a through electrode. The through electrode is an electrode penetrating through the device or chip, and can perform a function electrically connecting the corresponding devices and the devices stacked on the upper surface thereof. Also, the through electrode can function perform a function electrically connecting the corresponding devices and the device(s) on the lower surface thereof.
As the materials for the through electrode, any metal with low resistance can be used. However, as compared to the diameter of the through electrode, the distance between an upper chip and a lower chip is about 10 to 50 μm. Considering aspect ratio (distance between chips or length of the through hole vs. diameter of the through hole), it is about 50:1 to 300:1. Therefore, it is difficult to form the through electrode stably connected from an upper area to a lower area.
A need exists for a method capable of efficiently and stably forming an elongated through electrode.